New Features in Analog Insydes 2012

Analog Insydes 2012, our recent release of the software tool for symbolic modeling and analysis of analog circuits contains a large number of improvements to support the design of modern circuits. The enhanced functionality facilitates even more extensive analyses of the considered circuit and extended insights into its behavior. With this knowledge problems can be solved, that are not feasible using purely numeric methods. Thus, Analog Insydes accelerates the design process and contributes significantly to the optimization of analog circuits.

Furthermore, many new features allow a more efficient handling of modern circuits.

Below, the most important improvements of Analog Insydes 2012 are listed:

What's new in Analog Insydes 2012?

Analog Insydes 2012 provides advanced and extended features for designing modern analog circuits. These new capabilities solve challenges intractable by numerical methods and accelerate optimal parameter finding in analog design.

Create Circuit Schematics on Click

Analog Insydes 2012 offers a fast and user-friendly interface to the new Analog Insydes Schematics Creator. Fraunhofer ITWM created this graphical user interface for drawing circuit schematics exclusively for users of Analog Insydes. They can generate and manipulate wiring diagrams of Analog Insydes and custom components. For this purpose, the tool imports existing netlists, models and model cards. Thus, it yields a convenient environment for developing complex behavioral models just on click. The Schematics Creator is freely available here at www.analog-insydes.com .

Binaries On!

Analog Insydes 2012 introduces fast and handy platform-specific binaries supplementing its specialized numerical solvers. This speeds up all steps of the design flow which depend on simulation results like behavioral model order reduction.

Test Bench Setup

The new concept of multiple test benches for a device under testing (DUT) facilitates user friendly switching of test bench layouts. By quickly simulating devices in different setups Analog Insydes generates reduced behavioral models, which are valid for multiple test benches. Also, this allows you to easily export reduced behavioral models in hardware description languages like VHDL.

Identify Sequential Equations

Analog Insydes 2012 helps to benefit from our established sequential equations concept. To improve performance and stability this feature is utilizing structural information encoded by a special equation setup. Now you can instantly apply our improved procedures to custom models without further knowledge of the sequential syntax.

New Model Export Filters

Analog Insydes 2012 adds two new filters for exporting behavioral models to the Spectre® Compiled Model Interface (CMI) of Cadence® and the hardware description language Verilog-A.

New LTSpice® Import Filter

Analog Insydes 2012 is providing a comprehensive list of netlist import filters, which was extended for reading LTSpice® netlists. An extensive library of new device models (like VDMOS or OTA) allows for analyzing analog circuits created using LTSpice.

• See also here for established features of Analog Insydes