Model reduction for fast simulation of new semiconductor structures for nanotechnology and microsystems

Fraunhofer ITWM

Mixed numeric/symbolic MOR-methods for nanoelectronic systems regarding process variations

The trend from micro- to nanoelectronics complicates the design of analog circuits. The common modeling via nominal systems reaches its limit, since process variations in production and running of semiconductor devices are neglected. This leads to a drastic increase of the percentage of produced circuits whose characteristics are beyond their specifications.

To estimate the deviation of the circuit characteristic from the nominal one, often Monte-Carlo simulations are used, but these are computationally expensive or not applicable for complex systems and large parameter spaces. Thus there is a major interest in alternative simulation techniques, which yield a reliable and efficient prognosis of the device behavior under parameter deviations.

Hierarchical model order reduction of systems with parameter variations

Starting from a netlist description, mixed symbolic/numeric reduction methods are used to generate a reduced behavioral model.

The main focus of the project is the preservation of the physical parameters as well as the statistical validation of their effects onto the system behavior. The tool Analog Insydes for design and reduction of analog circuits which is developed at the ITWM is used for the realization of this work.

 

The concept of handling analog circuits with parameter variations elaborated during the Fraunhofer-project HIESPANA will be extended and alternative methods will be developed. Thereby sensitivity information of the direct or adjoint sensitivity analysis will be used and a parallelization of several time consuming sub steps will be realized.

 

 

The hierarchical approach developed in the BMBF-project SyreNe, exchanging relevant subsystems by their reduced behavioral model, will be enhanced. Especially in the context of parameter variations, the question about the aggregation of the subsystem errors onto the full system has to be answered. Here all relevant sub methods of the hierarchical approach will be parallelized, too.

Further Information

  • Typoe of project: BMBF
  • Projekt Partners:
    • TU Braunschweig
    • TU Darmstadt
    • MPI Magdeburg
    • TU Berlin
    • University of Hamburg
  • Duration: October 2010 - September 2013